Many electronic systems incorporate a plurality of small embedded devices, such as sensors, analog to digital converters, and digital to analog converters, which are controlled by Serial Peripheral Interfaces (SPIs), each of which is controlled by an SPI “master.” In some cases, these systems require precise timing and/or synchronous operation between the embedded, SPI-controlled devices, for example if multiple sensors need to be sampled simultaneously.
However, a standard SPI master can only communicate with one embedded device at a time. Of course, a plurality of SPI masters can be included in the system. However, it can be difficult to coordinate and synchronize the timing of the SPI masters, and therefore it can be difficult to control and coordinate the timing of the SPI-controlled embedded devices. For instance, SPI controlled devices can operate with a wide variety of control and data word bit lengths and variable timing, which requires compensating command timing to achieve simultaneous sampling of multiple types of ADCs or simultaneous driving of multiple types of DACs.
What is needed, therefore, is an apparatus for controlling and coordinating the timing of a plurality of SPI-controlled devices included in an electronic system.